EC6302 Digital Electronics Important Questions

Unit 1

 De-Morgan's Theorem

 Minterm and Maxterm

 SOP and POS

 Karnaugh map Minimization

 Don't care conditions

 Mc Cluskey method of minimization

 Logic Gates: AND, OR, NOT, NAND, NOR, Exclusive–OR, NAND–NOR and Exclusive–NOR

Implementations

 TTL and CMOS Logic and their characteristics

 Tristate gates

Unit 2

 Half and Full Adder

 Half and Full subtractor

 Parallel binary adder and Subtractor

 Carry Look Ahead adder

 Multiplexer/ Demultiplexer

 Code converters

 Magnitude Comparator

Unit 3

 Flip-flops

 SR, JK, D, T, and Master-Slave

 Edge and Level Triggering

 Realization of one flip flop using other flip flops

 Serial adder/subtractor

 Synchronous, Ring, Shift register and Shift counters

 Programmable counters

 Shift, Universal shift registers

 Sequence generators

Unit 4

 Classification of memories

 ROM, PROM, EPROM, EEPROM, EAPROM, RAM

 Memory cycle

 MOSFET and Dynamic RAM cell

 PLD , PLA , PAL

 Implementation of combinational logic circuits using ROM, PLA, PAL

Unit 5

 Use of Algorithmic State Machine

 Analysis of Synchronous Sequential Circuits Asynchronous Sequential Circuits

 Design of Hazard Free Switching circuits.

 Design of Combinational and Sequential circuits using VERILOG

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