EC2203 Digital Electronics Important Questions
Unit-I
K-Map minimization
Quine-McCluskey
Minimization of Boolean Expression
Logic Gates
Implementation of Logic function using Gates
Unit – II
Design of Half Adder, Half subtractor and Full adder, Full subtractor
Fast Adder (or) Carry Look ahead Adder
Multiplexer & Demultiplexer (or) Code Convertors
Decoder & Encoder
Parity Generator
Magnitude Comparator
Unit – III
Flip-flops SR, JK, D, T
Characteristics table and Equation
Ripple or serial counter
Design of Synchronous counters
Ring counter
Unit – IV
ROM Organization
RAM Organization
Memory Decoding & Expansion
MOSFET RAM Cell
PLA & PAL -> Problems
Unit – V
Design of Synchronous Sequential Circuit
Analysis of Synchronous Sequential Circuit
Design of Combinational & Sequential using VERILOG
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